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Appendix D: C64 Custom Chips

This section describes the register maps of the Commodore C64 Custom Chips. It is intended for the interested programmer, who wants to analyze C64 programs written by others or even write his own. If you are only interested in playing your favorite C64 game, then you do not need to worry about these details.

D.1 VIC 6567 (Video Controller) - D000-D02E

D000: Sprite#0 X-Position (Bits 7…0, Bit 8 is stored in D010)
D001: Sprite#0 Y-Position (Bits 7…0)
       The Top/Left Corner of the Screen has X/Y coordinates 24/50.
D002/D003: like D000/D001, but for Sprite#1
D004/D005: like D000/D001, but for Sprite#2
D006…D00F: like D000/D001, but for Sprites#3…7
D010: Sprite X-Position High Bits
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D011: Control Reg. 1
       Bit 7: Bit 8 for D012
       Bit 6: 1: Extended Color Text Mode
       Bit 5: 0: Text Mode      ~ 1: Bitmap Mode
       Bit 4: 0: Screen Disable ~ 1: Screen Enable
       Bit 3: 0: 24 Lines/Screen ~ 1: 25 Lines/Screen
       Bits 2…0: Soft Scrolling Y-Position
D012: Read:  Current Scanline (Bits 7…0, Bit 8 is available in D011)
       Write: Scanline that creates a raster interrupt
D013: Lightpen X-Pos (Bits 8…1)
D014: Lightpen Y-Pos (Bits 7…0)
D015: Sprite Enable (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D016: Control Reg. 2
       Bits 7…5: Unused
       Bit 4: 1: Multi Color Mode
       Bit 3: 0: 38 Chars/Line  ~ 1: 40 Chars/Line
       Bits 2…0: Soft Scrolling X-Position
D017: Sprite Scale Double Width
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D018: Video Address Register
       Bits 7…4: Bits 13…10 of VideoRAM Addr.
       Bits 3…1: Bits 13…11 of CharacterRAM Addr. in Text Mode
       Bits 3:   Bit 13 of Bitmap Addr in Bitmap Mode
       Bit 0:    Unused
       Bits 15…14 of both values are stored (negated) in DD00 (CIA2).
       The lower bits (9/10…0) are always 0.
D019: Interrupt Pending Register
       Bit 7: 1: At least one pending interrupt
       Bits 6…4: Unused
       Bit 3: 1: Lightpen interrupt pending
       Bit 2: 1: Sprite/Sprite Collision interrupt pending
       Bit 1: 1: Sprite/Background Collision interrupt pending
       Bit 0: 1: Raster interrupt pending
D01A: Interrupt Mask Register
       Bits 7…4: Unused
       Bit 3: 1: Lightpen interrupt enable
       Bit 2: 1: Sprite/Sprite Collision interrupt enable (see D01E)
       Bit 1: 1: Sprite/Backgd. Collision interrupt enable (see D01F)
       Bit 0: 1: Raster interrupt enable (see D012)
D01B: Sprite/Background Priority
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
       0: Sprite is 'in front' of background
       1: Sprite is 'behind' background
D01C: MultiColor Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D01D: Sprite Scale Double Height
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D01E: Sprite/Sprite Collision Detection
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D01F: Sprite/Background Collision Detection
       One Bit per Sprite (Bit 0 for Sprite#0, Bit 1 for Sprite#1…)
D020: Border Color
       All Color register use only bits 0…3; Bits 7…4 are unused.
D021: Background Color
D022: Background Color #1 for Multi Color/Extended Color Mode
D023: Background Color #2 for Multi Color/Extended Color Mode
D024: Background Color #3 for Extended Color Text Mode
D025: Sprite Multi Color #0 for Multi Color Sprites
D026: Sprite Multi Color #1 for Multi Color Sprites
D027: Sprite Color for Sprite #0
D028: Sprite Color for Sprite #1
D029…D02E: Sprite Color for Sprites #2…7

The Sprite Pointers are stored at VideoRAM+03F8…03FF; One Byte per Sprite for Bits 13…6. Bits 15…14 are stored (inverted) at DD00 Bits 1…0. Bits 5…0 are always 0.

D.2 SID 6581 (Sound Interface Device) - D400-D41C

D400: Oscillator#1: Frequency Control: Bits  7…0
D401: Oscillator#1: Frequency Control: Bits 15…8
       To convert from Frequency Control Value to actual Frequency
       multiply by (System Clock Rate / 2^24)
D402: Oscillator#1: Pulswidth for Rectangle Wave: Bits  7…0
D403: Oscillator#1: Pulswidth for Rectangle Wave: Bits 11…8
D404: Oscillator#1 Control
       Bits 7…4: Select the Waveform. Only one waveform can be
                 selected at any time (no mixing!)
                 Bit 7: Noise
                 Bit 6: Rectangle
                 Bit 5: Sawtooth
                 Bit 4: Triangle
       Bit 3: Test Bit - 1: Lock Oscillator
       Bit 2: Ringmodulation
       Bit 1: Synchronization
       Bit 0: Gate: Enable Oscillator
              Transition 0->1 starts Attack-Decay-Sustain-Cycle
              Transition 1->0 starts Release Phase
D405: Oscillator#1: Envelope Form
       Bits 7…4: Attack Speed
       Bits 3…0: Decay Speed
D406: Oscillator#1: Envelope Form
       Bits 7…4: Sustain Level
       Bits 3…0: Release Speed
D407…D40D: like D400…D406, but for Oscillator#2
D40E…D414: like D400…D406, but for Oscillator#3
D415: Filter Freq. Control: Bits  2…0
D416: Filter Freq. Control: Bits 10…3
       To convert from Filter Freq. Control Value to actual
       Filter Frequency multiply by 5.8 and add 30 Hz.
D417: Filter/Resonance Control
       Bits 7…4: Resonance Intensity
       Bit 3: 1: enable filter for external signal
       Bit 2: 1: enable filter for Oscillator#3
       Bit 1: 1: enable filter for Oscillator#2
       Bit 0: 1: enable filter for Oscillator#1
D418: Filter Control/Volume
       Bit 7: 1: Mute Oscillator#3
       Bit 6: 1: Filter acts as High-Pass filter
       Bit 5: 1: Filter acts as Band-Pass filter
       Bit 4: 1: Filter acts as Low-Pass filter
       Bits 3…0: Volume
D419: Paddle 1 Position
D41A: Paddle 2 Position
D41B: Current State of Oscillator#3's Wave
D41C: Current State of Oscillator#3's Envelope

D.3 CIA 6526 (Complex Interface Adapter)
CIA1: DC00-DC0F / CIA2: DD00-DD0F

Dx00: Port A Data Register
Dx01: Port B Data Register
Dx02: Port A Data Direction Register (0: Input ~ 1: Output)
Dx03: Port B Data Direction Register (0: Input ~ 1: Output)
Dx04: Timer A Bits  7…0
       Read:  Current State of Timer A
       Write: Value to be loaded at next start of Timer A
Dx05: Timer A Bits 15…8
       Read:  Current State of Timer A
       Write: Value to be loaded at next start of Timer A
Dx06: Timer B Bits  7…0
Dx07: Timer B Bits 15…8
Dx08: Time of Day/Alarm 10th Second
       Read:  Time of Day 10th Second in BCD Format (Bits 3…0)
       Write and Control Reg. B Bit 7 = 0:
         Set Time of Day 10th Second
       Write and Control Reg. B Bit 7 = 1:
         Set Alarm Time 10th Second
Dx09: Time of Day/Alarm Second (BCD Format)
       Access modes like Dx08
Dx0A: Time of Day/Alarm Minutes (BCD Format)
       Access modes like Dx08
Dx0B: Time of Day/Alarm Hours (BCD Format)
       Bit 7: 0: AM ~ 1: PM
       Access modes like Dx08
       Reading Dx0B latches the Time of Day.
       Reading Dx08 releases the Latch.
Dx0C: Serial Data Register
Dx0D: Interrupt Control Register
       Bit 7: Read: At least one interrupt source is pending
                Reading the Interrupt Control Reg. clears all Bits.
              Write: 0: Every 1 Bit clear the corresponding Mask Bit
                        The other Bits remain untouched.
                     1: Every 1 Bit sets the corresponding Mask Bit
                        The other Bits remain untouched.
       Bits 6…5: Unused (always 0)
       Bit 4: Signal on Pin FLAG
       Bit 3: Serial Data Reg. Full/Empty
       Bit 2: Alarm Time equals Time of Day
       Bit 1: Timer B Underflow
       Bit 0: Timer A Underflow
       Reading the Interrupt Control Reg. clears all Bits.
Dx0E: Control Register A
       Bit 7: Time of Day Trigger Speed: 0: 60 Hz ~ 1: 50 Hz
       Bit 6: Serial Data Direction: 0: Input ~ 1: Output
       Bit 5: Timer A Trigger Source: 0: System Clock ~ 1: CNT-Pin
       Bit 4: 1: Force Load of Timer A
       Bit 3: 0: Automatically restart Timer A after Countdown has
                 completed
              1: Timer A is stopped when Countdown is complete.
       Bit 2: 0: Every underflow of Timer A causes Pin PB6 to go high
                 for one clock cycle
              1: Every underflow of Timer A toggles Pin PB6.
       Bit 1: Underflow of Timer A is indicated on Pin PB6.
       Bit 0: Timer A enable: 1: Go ~ 0: Stop
Dx0F: Control Register B
       Bit 7: 0: Set Time of Day ~ 1: Set Alarm Time
       Bits 6…5: Timer B Trigger Source
              00: System Clock      ~ 01: CNT-Pin
              10: Timer A Underflow ~ 11: Timer A Underflow if CNT=1
       Bits 4…0: like DC0E but for Timer B and Pin PB7

DC00: CIA1 Port A
       Bits 7…0: Keyboard Row Selection
       Bits 7…6: Paddle Set Selection (only one bit may be active)
       Bit 4: Joystick#2 Fire
       Bit 3: Joystick#2 Right
       Bit 2: Joystick#2 Left
       Bit 1: Joystick#2 Down
       Bit 0: Joystick#2 Up

DC01: CIA1 Port B
       Bits 7…0: Keyboard Column Result
       Bit 4: Joystick#1 Fire
       Bit 3: Joystick#1 Right
       Bit 2: Joystick#1 Left
       Bit 1: Joystick#1 Down
       Bit 0: Joystick#1 Up

DC0D: CIA1 Interr. Control Reg.
       Bit 4 (FLAG Pin): Tape Data Input

DD00: CIA2 Port A
       Bit 7: IEC-Bus: DATA Input
       Bit 6: IEC-Bus: CLOCK Input
       Bit 5: IEC-Bus: DATA Output
       Bit 4: IEC-Bus: CLOCK Output
       Bit 3: IEC-Bus: ATN Output
       Bit 2: RS232: TXD (only with RS232 Cartridge)
       Bit 1…0: High Order Bits (15…14) of Video Addr. (inverted)

DD01: CIA2 Port B (only with RS232 Cartridge)
       Bit 7: RS232: DSR (Data Set Ready)
       Bit 6: RS232: CTS (Clear to Send)
       Bit 4: RS232: DCD (Data Carrier Detect)
       Bit 3: RS232: RI  (Ring Indicator)
       Bit 2: RS232: DTR (Data Terminal Ready)
       Bit 1: RS232: RTS (Request to Send)
       Bit 0: RS232: RXD (Receive Data)

DD0D: CIA2 Interr. Control Reg.
       Bit 4 (FLAG Pin): RS232: RXD (only with RS232 Cartridge)

D.4 CPU 6510 Port

0000: CPU Port Data Direction Register: 0: Input ~ 1: Output
0001: CPU Port Data Register
       Bits 7…6: Not Implemented
       Bit 5: Tape: Motor (inverted)
       Bit 4: Tape: Play Button
       Bit 3: Tape: Data Output
       Bits 2…0: Select Memory Configuration
          Read:   $A000-BFFF  $D000-DFFF  $E000-FFFF
             000:     RAM         RAM         RAM
             001:     RAM         ROM         RAM
             010:     RAM         ROM         ROM
             011:     ROM         ROM         ROM
             100:     RAM         RAM         RAM
             101:     RAM         I/O         RAM
             110:     RAM         I/O         ROM
             111:     ROM         I/O         ROM

          Write:  $A000-BFFF  $D000-DFFF  $E000-FFFF
             0xx:     RAM         RAM         RAM
             100:     RAM         RAM         RAM
             101:     RAM         I/O         RAM
             11x:     RAM         I/O         RAM
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Source: http://www.infinite-loop.at/Power64/Documentation/Power64-ReadMe/AD-Custom_Chips.html
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Last Changed: Feb. 29, 2008
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